/dts-v1/;

/ {
	#address-cells = <0x01>;
	#size-cells = <0x01>;
	model = "INFINITY6 SSC009A-S01A QFN88";
	compatible = "sstar,infinity6";

	chosen {
		bootargs = "console=ttyS0,115200n8r androidboot.console=ttyS0 root=/dev/mtdblock2 init=/linuxrc cma=16m";
	};

	aliases {
		console = "/soc/uart0@1F221000";
		serial0 = "/soc/uart0@1F221000";
		serial1 = "/soc/uart1@1F221200";
		serial2 = "/soc/uart2@1F220400";
	};

	memory {
		device_type = "memory";
		reg = <0x20000000 0x7e00000>;
	};

	cpus {
		#address-cells = <0x01>;
		#size-cells = <0x00>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a7";
			clocks = <0x01>;
			reg = <0x00>;
			operating-points = <0x124f80 0xf4240 0x10c8e0 0xf4240 0xf4240 0xf4240 0xc3500 0xdbba0 0x61a80 0xdbba0>;
		};
	};

	soc {
		compatible = "simple-bus";
		interrupt-parent = <0x02>;
		#address-cells = <0x01>;
		#size-cells = <0x01>;
		ranges;

		gic@16000000 {
			compatible = "arm,cortex-a7-gic";
			#interrupt-cells = <0x03>;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			interrupt-controller;
			interrupt-parent = <0x03>;
			reg = <0x16001000 0x1000 0x16002000 0x1000>;
			linux,phandle = <0x03>;
			phandle = <0x03>;
		};

		ms_main_intc {
			compatible = "sstar,main-intc";
			#interrupt-cells = <0x03>;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			interrupt-parent = <0x03>;
			interrupt-controller;
			linux,phandle = <0x02>;
			phandle = <0x02>;
		};

		ms_pm_intc {
			compatible = "sstar,pm-intc";
			#interrupt-cells = <0x01>;
			interrupt-parent = <0x02>;
			interrupt-controller;
			interrupts = <0x00 0x22 0x04>;
			linux,phandle = <0xbb>;
			phandle = <0xbb>;
		};

		ms_gpi_intc {
			compatible = "sstar,gpi-intc";
			#interrupt-cells = <0x01>;
			interrupt-parent = <0x02>;
			interrupt-controller;
			interrupts = <0x00 0x58 0x04>;
			linux,phandle = <0xba>;
			phandle = <0xba>;
		};

		arch_timer {
			compatible = "arm,cortex-a7-timer\0arm,armv7-timer";
			interrupt-parent = <0x03>;
			interrupts = <0x01 0x0d 0x308 0x01 0x0e 0x308 0x01 0x0b 0x308 0x01 0x0a 0x308>;
			clock-frequency = <0x5b8d80>;
		};

		pmu {
			compatible = "arm,cortex-a7-pmu";
			interrupt-parent = <0x03>;
			interrupts = <0x00 0x0a 0x04 0x00 0x10 0x04 0x00 0x16 0x04 0x00 0x1c 0x04>;
		};

		clocks {
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges;

			CLK_VOID {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x01>;
				linux,phandle = <0x39>;
				phandle = <0x39>;
			};

			CLK_utmi_480m {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x1c9c3800>;
				linux,phandle = <0x4f>;
				phandle = <0x4f>;
			};

			CLK_mpll_432m {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x19bfcc00>;
				linux,phandle = <0x0f>;
				phandle = <0x0f>;
			};

			CLK_upll_384m {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x04>;
				clock-div = <0x05>;
				clock-mult = <0x04>;
				linux,phandle = <0x50>;
				phandle = <0x50>;
			};

			CLK_upll_320m {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x04>;
				clock-div = <0x03>;
				clock-mult = <0x02>;
				linux,phandle = <0x51>;
				phandle = <0x51>;
			};

			CLK_mpll_288m {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x112a8800>;
				linux,phandle = <0x06>;
				phandle = <0x06>;
			};

			CLK_utmi_240m {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x05>;
				clock-div = <0x02>;
				clock-mult = <0x01>;
				linux,phandle = <0x52>;
				phandle = <0x52>;
			};

			CLK_mpll_216m {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0xcdfe600>;
				linux,phandle = <0x07>;
				phandle = <0x07>;
			};

			CLK_utmi_192m {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x05>;
				clock-div = <0x05>;
				clock-mult = <0x02>;
				linux,phandle = <0x0a>;
				phandle = <0x0a>;
			};

			CLK_mpll_172m {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0xa4cb800>;
				linux,phandle = <0x3e>;
				phandle = <0x3e>;
			};

			CLK_utmi_160m {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x05>;
				clock-div = <0x03>;
				clock-mult = <0x01>;
				linux,phandle = <0x0b>;
				phandle = <0x0b>;
			};

			CLK_mpll_123m {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x75aef40>;
				linux,phandle = <0x08>;
				phandle = <0x08>;
			};

			CLK_mpll_86m {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x5265c00>;
				linux,phandle = <0x09>;
				phandle = <0x09>;
			};

			CLK_mpll_288m_div2 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x06>;
				clock-div = <0x02>;
				clock-mult = <0x01>;
				linux,phandle = <0x3f>;
				phandle = <0x3f>;
			};

			CLK_mpll_288m_div4 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x06>;
				clock-div = <0x04>;
				clock-mult = <0x01>;
				linux,phandle = <0x42>;
				phandle = <0x42>;
			};

			CLK_mpll_288m_div8 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x06>;
				clock-div = <0x08>;
				clock-mult = <0x01>;
				linux,phandle = <0x2b>;
				phandle = <0x2b>;
			};

			CLK_mpll_216m_div2 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x07>;
				clock-div = <0x02>;
				clock-mult = <0x01>;
				linux,phandle = <0x40>;
				phandle = <0x40>;
			};

			CLK_mpll_216m_div4 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x07>;
				clock-div = <0x04>;
				clock-mult = <0x01>;
				linux,phandle = <0x44>;
				phandle = <0x44>;
			};

			CLK_mpll_216m_div8 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x07>;
				clock-div = <0x08>;
				clock-mult = <0x01>;
				linux,phandle = <0x47>;
				phandle = <0x47>;
			};

			CLK_mpll_123m_div2 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x08>;
				clock-div = <0x02>;
				clock-mult = <0x01>;
				linux,phandle = <0x48>;
				phandle = <0x48>;
			};

			CLK_mpll_86m_div2 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x09>;
				clock-div = <0x02>;
				clock-mult = <0x01>;
				linux,phandle = <0x29>;
				phandle = <0x29>;
			};

			CLK_mpll_86m_div4 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x09>;
				clock-div = <0x04>;
				clock-mult = <0x01>;
				linux,phandle = <0x49>;
				phandle = <0x49>;
			};

			CLK_mpll_86m_div16 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x09>;
				clock-div = <0x10>;
				clock-mult = <0x01>;
				linux,phandle = <0x4a>;
				phandle = <0x4a>;
			};

			CLK_utmi_192m_div4 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0a>;
				clock-div = <0x04>;
				clock-mult = <0x01>;
				linux,phandle = <0x28>;
				phandle = <0x28>;
			};

			CLK_utmi_160m_div4 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0b>;
				clock-div = <0x04>;
				clock-mult = <0x01>;
				linux,phandle = <0x2a>;
				phandle = <0x2a>;
			};

			CLK_utmi_160m_div5 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0b>;
				clock-div = <0x05>;
				clock-mult = <0x01>;
				linux,phandle = <0x2c>;
				phandle = <0x2c>;
			};

			CLK_utmi_160m_div8 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0b>;
				clock-div = <0x08>;
				clock-mult = <0x01>;
				linux,phandle = <0x2d>;
				phandle = <0x2d>;
			};

			CLK_xtali_12m {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0xb71b00>;
				linux,phandle = <0x0c>;
				phandle = <0x0c>;
			};

			CLK_xtali_12m_div8 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-div = <0x08>;
				clock-mult = <0x01>;
				linux,phandle = <0x3a>;
				phandle = <0x3a>;
			};

			CLK_xtali_12m_div16 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-div = <0x10>;
				clock-mult = <0x01>;
				linux,phandle = <0x3b>;
				phandle = <0x3b>;
			};

			CLK_xtali_12m_div40 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-div = <0x28>;
				clock-mult = <0x01>;
				linux,phandle = <0x2e>;
				phandle = <0x2e>;
			};

			CLK_xtali_12m_div64 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-div = <0x40>;
				clock-mult = <0x01>;
				linux,phandle = <0x3c>;
				phandle = <0x3c>;
			};

			CLK_xtali_12m_div128 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-div = <0x80>;
				clock-mult = <0x01>;
				linux,phandle = <0x3d>;
				phandle = <0x3d>;
			};

			CLK_xtali_24m {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x16e3600>;
				linux,phandle = <0x33>;
				phandle = <0x33>;
			};

			CLK_RTC_CLK_32K {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x7d00>;
				linux,phandle = <0x5c>;
				phandle = <0x5c>;
			};

			CLK_pm_riu_w_clk_in {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x34>;
				phandle = <0x34>;
			};

			CLK_lpll_clk_div2 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0e>;
				clock-div = <0x02>;
				clock-mult = <0x01>;
				linux,phandle = <0x4b>;
				phandle = <0x4b>;
			};

			CLK_lpll_clk_div4 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0e>;
				clock-div = <0x04>;
				clock-mult = <0x01>;
				linux,phandle = <0x4c>;
				phandle = <0x4c>;
			};

			CLK_lpll_clk_div8 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0e>;
				clock-div = <0x08>;
				clock-mult = <0x01>;
				linux,phandle = <0x4d>;
				phandle = <0x4d>;
			};

			CLK_armpll_37p125m {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0f>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x4e>;
				phandle = <0x4e>;
			};

			CLK_riu_w_clk_in {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x1f>;
				phandle = <0x1f>;
			};

			CLK_riu_w_clk_top {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x1e>;
				phandle = <0x1e>;
			};

			CLK_riu_w_clk_sc_gp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x20>;
				phandle = <0x20>;
			};

			CLK_riu_w_clk_vhe_gp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x21>;
				phandle = <0x21>;
			};

			CLK_riu_w_clk_hemcu_gp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x22>;
				phandle = <0x22>;
			};

			CLK_riu_w_clk_mipi_if_gp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x23>;
				phandle = <0x23>;
			};

			CLK_riu_w_clk_mcu_if_gp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x24>;
				phandle = <0x24>;
			};

			CLK_miu_p {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x10>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x1b>;
				phandle = <0x1b>;
			};

			CLK_mspi0_p {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x11>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x45>;
				phandle = <0x45>;
			};

			CLK_mspi1_p {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x12>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x46>;
				phandle = <0x46>;
			};

			CLK_miu_vhe_gp_p {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x13>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x1c>;
				phandle = <0x1c>;
			};

			CLK_miu_sc_gp_p {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x14>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x1d>;
				phandle = <0x1d>;
			};

			CLK_miu2x_p {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x15>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x26>;
				phandle = <0x26>;
			};

			CLK_mcu_p {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x41>;
				phandle = <0x41>;
			};

			CLK_mcu_pm_p {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x16>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x77>;
				phandle = <0x77>;
			};

			CLK_isp_p {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x17>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x72>;
				phandle = <0x72>;
			};

			CLK_fclk1_p {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x18>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x2f>;
				phandle = <0x2f>;
			};

			CLK_fclk2_p {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x19>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x30>;
				phandle = <0x30>;
			};

			CLK_sdio_p {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1a>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0xaf>;
				phandle = <0xaf>;
			};

			CLK_tck_buf {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x01>;
				linux,phandle = <0x27>;
				phandle = <0x27>;
			};

			CLK_pad2isp_sr_pclk {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x01>;
				linux,phandle = <0xa0>;
				phandle = <0xa0>;
			};

			CLK_ccir_in_clk {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x01>;
				linux,phandle = <0x63>;
				phandle = <0x63>;
			};

			CLK_eth_buf {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x01>;
				linux,phandle = <0x54>;
				phandle = <0x54>;
			};

			CLK_rmii_buf {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x01>;
				linux,phandle = <0x55>;
				phandle = <0x55>;
			};

			CLK_emac_testrx125_in_lan {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x01>;
				linux,phandle = <0x53>;
				phandle = <0x53>;
			};

			CLK_miu_ff {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1b>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x80>;
				phandle = <0x80>;
			};

			CLK_miu_sc_gp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1b>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x14>;
				phandle = <0x14>;
			};

			CLK_miu_vhe_gp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1b>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x13>;
				phandle = <0x13>;
			};

			CLK_miu_dig {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x10>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x7d>;
				phandle = <0x7d>;
			};

			CLK_miu_xd2miu {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x10>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x9b>;
				phandle = <0x9b>;
			};

			CLK_miu_urdma {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x10>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x99>;
				phandle = <0x99>;
			};

			CLK_miu_bdma {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x10>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x7b>;
				phandle = <0x7b>;
			};

			CLK_miu_vhe {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1c>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x9a>;
				phandle = <0x9a>;
			};

			CLK_miu_mfeh {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x8b>;
				phandle = <0x8b>;
			};

			CLK_miu_mfe {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x8a>;
				phandle = <0x8a>;
			};

			CLK_miu_jpe1 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x89>;
				phandle = <0x89>;
			};

			CLK_miu_jpe0 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x88>;
				phandle = <0x88>;
			};

			CLK_miu_bach {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x7a>;
				phandle = <0x7a>;
			};

			CLK_miu_file {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x81>;
				phandle = <0x81>;
			};

			CLK_miu_uhc0 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x98>;
				phandle = <0x98>;
			};

			CLK_miu_emac {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x7e>;
				phandle = <0x7e>;
			};

			CLK_miu_cmdq {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x7c>;
				phandle = <0x7c>;
			};

			CLK_miu_isp_dnr {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x84>;
				phandle = <0x84>;
			};

			CLK_miu_isp_rot {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x85>;
				phandle = <0x85>;
			};

			CLK_miu_isp_dma {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x83>;
				phandle = <0x83>;
			};

			CLK_miu_isp_sta {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x86>;
				phandle = <0x86>;
			};

			CLK_miu_gop {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x82>;
				phandle = <0x82>;
			};

			CLK_miu_sc_dnr {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x95>;
				phandle = <0x95>;
			};

			CLK_miu_sc_dnr_sad {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x96>;
				phandle = <0x96>;
			};

			CLK_miu_sc_crop {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x94>;
				phandle = <0x94>;
			};

			CLK_miu_sc1_frm {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x8e>;
				phandle = <0x8e>;
			};

			CLK_miu_sc1_snp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x8f>;
				phandle = <0x8f>;
			};

			CLK_miu_sc1_snpi {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x90>;
				phandle = <0x90>;
			};

			CLK_miu_sc1_dbg {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x8d>;
				phandle = <0x8d>;
			};

			CLK_miu_sc2_frm {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x91>;
				phandle = <0x91>;
			};

			CLK_miu_sc2_snpi {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x92>;
				phandle = <0x92>;
			};

			CLK_miu_sc3_frm {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x93>;
				phandle = <0x93>;
			};

			CLK_miu_fcie {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x7f>;
				phandle = <0x7f>;
			};

			CLK_miu_sdio {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x97>;
				phandle = <0x97>;
			};

			CLK_miu_ive {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x87>;
				phandle = <0x87>;
			};

			CLK_riu {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1e>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0xa3>;
				phandle = <0xa3>;
			};

			CLK_riu_nogating {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1f>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0xa7>;
				phandle = <0xa7>;
			};

			CLK_riu_sc_gp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x20>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0xa9>;
				phandle = <0xa9>;
			};

			CLK_riu_vhe_gp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x21>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0xaa>;
				phandle = <0xaa>;
			};

			CLK_riu_hemcu_gp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x22>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0xa4>;
				phandle = <0xa4>;
			};

			CLK_riu_mipi_gp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x23>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0xa6>;
				phandle = <0xa6>;
			};

			CLK_riu_mcu_if {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x24>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0xa5>;
				phandle = <0xa5>;
			};

			CLK_miu2x {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x25>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x15>;
				phandle = <0x15>;
			};

			CLK_axi2x {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x26>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x5e>;
				phandle = <0x5e>;
			};

			CLK_tck {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x27>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0xb3>;
				phandle = <0xb3>;
			};

			CLK_imi {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1b>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x70>;
				phandle = <0x70>;
			};

			CLK_sdio {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x0c 0x2e>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				reg = <0x1f207114 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x03>;
				gate-shift = <0x00>;
				linux,phandle = <0x1a>;
				phandle = <0x1a>;
			};

			CLK_gop0 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x2f>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x6c>;
				phandle = <0x6c>;
			};

			CLK_gop1 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x2f>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x6d>;
				phandle = <0x6d>;
			};

			CLK_gop2 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x30>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x6e>;
				phandle = <0x6e>;
			};

			CLK_mpll_144m {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x8954400>;
				linux,phandle = <0x31>;
				phandle = <0x31>;
			};

			CLK_mpll_144m_div2 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x31>;
				clock-div = <0x02>;
				clock-mult = <0x01>;
				linux,phandle = <0x5a>;
				phandle = <0x5a>;
			};

			CLK_mpll_144m_div4 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x31>;
				clock-div = <0x04>;
				clock-mult = <0x01>;
				linux,phandle = <0x59>;
				phandle = <0x59>;
			};

			CLK_xtali_12m_div2 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-div = <0x02>;
				clock-mult = <0x01>;
				linux,phandle = <0x57>;
				phandle = <0x57>;
			};

			CLK_xtali_12m_div4 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-div = <0x04>;
				clock-mult = <0x01>;
				linux,phandle = <0x58>;
				phandle = <0x58>;
			};

			CLK_xtali_12m_div12 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-div = <0x0c>;
				clock-mult = <0x01>;
				linux,phandle = <0x5b>;
				phandle = <0x5b>;
			};

			CLK_rtc_32k {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x7d00>;
				linux,phandle = <0x32>;
				phandle = <0x32>;
			};

			CLK_rtc_32k_div4 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x32>;
				clock-div = <0x04>;
				clock-mult = <0x01>;
				linux,phandle = <0x56>;
				phandle = <0x56>;
			};

			CLK_live_pm {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x33>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x75>;
				phandle = <0x75>;
			};

			CLK_riu_pm {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x34>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0xa8>;
				phandle = <0xa8>;
			};

			CLK_miupll_clk {
				#clock-cells = <0x00>;
				compatible = "sstar,complex-clock";
				clocks = <0x33>;
				linux,phandle = <0x38>;
				phandle = <0x38>;
			};

			CLK_ddrpll_clk {
				#clock-cells = <0x00>;
				compatible = "sstar,complex-clock";
				clocks = <0x35>;
				linux,phandle = <0x25>;
				phandle = <0x25>;
			};

			CLK_lpll_clk {
				#clock-cells = <0x00>;
				compatible = "sstar,complex-clock";
				clocks = <0x0f>;
				linux,phandle = <0x0e>;
				phandle = <0x0e>;
			};

			CLK_cpupll_clk {
				#clock-cells = <0x00>;
				compatible = "sstar,complex-clock";
				clocks = <0x0f>;
				linux,phandle = <0x01>;
				phandle = <0x01>;
			};

			CLK_utmi {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x1c9c3800>;
				linux,phandle = <0x05>;
				phandle = <0x05>;
			};

			CLK_upll {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x1c9c3800>;
				linux,phandle = <0x04>;
				phandle = <0x04>;
			};

			CLK_fuart0_synth_out {
				#clock-cells = <0x00>;
				compatible = "sstar,complex-clock";
				clocks = <0x36>;
				linux,phandle = <0x43>;
				phandle = <0x43>;
			};

			CLK_csi2_mac_p {
				#clock-cells = <0x00>;
				compatible = "sstar,complex-clock";
				clocks = <0x37>;
				linux,phandle = <0x64>;
				phandle = <0x64>;
			};

			CLK_miu {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x07 0x38 0x39 0x39>;
				reg = <0x1f20705c 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				glitch-shift = <0x04>;
				auto-enable = <0x01>;
				linux,phandle = <0x10>;
				phandle = <0x10>;
			};

			CLK_ddr_syn {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x0f 0x07 0x0c 0x39>;
				reg = <0x1f207064 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				linux,phandle = <0x35>;
				phandle = <0x35>;
			};

			CLK_miu_rec {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x3a 0x3b 0x3c 0x3d>;
				reg = <0x1f207060 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				linux,phandle = <0x8c>;
				phandle = <0x8c>;
			};

			CLK_mcu {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x07 0x3e 0x3f 0x40>;
				reg = <0x1f207004 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				glitch-shift = <0x04>;
				auto-enable = <0x01>;
				linux,phandle = <0x0d>;
				phandle = <0x0d>;
			};

			CLK_riubrdg {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x41 0x39 0x39 0x39>;
				reg = <0x1f207004 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				gate-shift = <0x08>;
				auto-enable = <0x01>;
				linux,phandle = <0xab>;
				phandle = <0xab>;
			};

			CLK_bdma {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x1b 0x39 0x39 0x39>;
				reg = <0x1f207180 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				linux,phandle = <0x5f>;
				phandle = <0x5f>;
			};

			CLK_spi {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x07 0x40 0x09 0x42>;
				reg = <0x1f2070c8 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				glitch-shift = <0x04>;
				auto-enable = <0x01>;
				linux,phandle = <0xb0>;
				phandle = <0xb0>;
			};

			CLK_uart0 {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x3e 0x3f 0x0c 0x39>;
				reg = <0x1f2070c4 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				linux,phandle = <0xb4>;
				phandle = <0xb4>;
			};

			CLK_uart1 {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x3e 0x3f 0x0c 0x39>;
				reg = <0x1f2070c4 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				gate-shift = <0x08>;
				linux,phandle = <0xb5>;
				phandle = <0xb5>;
			};

			CLK_fuart0_synth_in {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x0f 0x07 0x39 0x39>;
				reg = <0x1f2070d0 0x04>;
				mux-shift = <0x06>;
				mux-width = <0x02>;
				gate-shift = <0x04>;
				linux,phandle = <0x36>;
				phandle = <0x36>;
			};

			CLK_fuart {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x3e 0x3f 0x0c 0x43>;
				reg = <0x1f2070d0 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				linux,phandle = <0x6b>;
				phandle = <0x6b>;
			};

			CLK_mspi0 {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x40 0x44 0x0c 0x3f>;
				reg = <0x1f2070cc 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				linux,phandle = <0x11>;
				phandle = <0x11>;
			};

			CLK_mspi1 {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x40 0x44 0x0c 0x3f>;
				reg = <0x1f2070cc 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				gate-shift = <0x08>;
				linux,phandle = <0x12>;
				phandle = <0x12>;
			};

			CLK_mspi {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x45 0x46>;
				reg = <0x1f2070cc 0x04>;
				mux-shift = <0x0e>;
				mux-width = <0x01>;
				gate-shift = <0x0c>;
				linux,phandle = <0x9c>;
				phandle = <0x9c>;
			};

			CLK_miic0 {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x42 0x44 0x0c 0x39>;
				reg = <0x1f2070dc 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				linux,phandle = <0x78>;
				phandle = <0x78>;
			};

			CLK_miic1 {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x42 0x44 0x0c 0x39>;
				reg = <0x1f2070dc 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				gate-shift = <0x08>;
				linux,phandle = <0x79>;
				phandle = <0x79>;
			};

			CLK_bist {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x3e 0x40 0x44 0x0c>;
				reg = <0x1f207008 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				linux,phandle = <0x60>;
				phandle = <0x60>;
			};

			CLK_pwr_ctl {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x3b 0x3a 0x0c 0x39>;
				reg = <0x1f207010 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				linux,phandle = <0xa2>;
				phandle = <0xa2>;
			};

			CLK_xtali {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x39 0x39 0x39>;
				reg = <0x1f207000 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				linux,phandle = <0xb7>;
				phandle = <0xb7>;
			};

			CLK_live {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x39 0x39 0x39>;
				reg = <0x1f207000 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				gate-shift = <0x08>;
				auto-enable = <0x01>;
				linux,phandle = <0x74>;
				phandle = <0x74>;
			};

			CLK_sr_mclk {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x47 0x42 0x48 0x44 0x28 0x29 0x2b 0x33 0x49 0x0c 0x4a 0x0e 0x4b 0x4c 0x4d 0x4e>;
				reg = <0x1f207188 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x04>;
				gate-shift = <0x08>;
				linux,phandle = <0xb2>;
				phandle = <0xb2>;
			};

			CLK_bist_vhe_gp {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x06 0x07 0x40 0x0c>;
				reg = <0x1f20700c 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				gate-shift = <0x08>;
				linux,phandle = <0x62>;
				phandle = <0x62>;
			};

			CLK_vhe {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x4f 0x0f 0x50 0x51 0x06 0x52 0x0a 0x08>;
				reg = <0x1f2071a0 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x03>;
				gate-shift = <0x00>;
				linux,phandle = <0xb6>;
				phandle = <0xb6>;
			};

			CLK_xtali_sc_gp {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x39 0x39 0x39>;
				reg = <0x1f207000 0x04>;
				mux-shift = <0x06>;
				mux-width = <0x02>;
				gate-shift = <0x04>;
				auto-enable = <0x01>;
				linux,phandle = <0xb8>;
				phandle = <0xb8>;
			};

			CLK_bist_sc_gp {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x3e 0x40 0x44 0x0c>;
				reg = <0x1f20700c 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				linux,phandle = <0x61>;
				phandle = <0x61>;
			};

			CLK_emac_ahb {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x3f 0x08 0x09 0x53>;
				reg = <0x1f207108 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				linux,phandle = <0x66>;
				phandle = <0x66>;
			};

			CLK_jpe {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x4f 0x0f 0x50 0x51 0x06 0x07 0x39 0x39>;
				reg = <0x1f2071a8 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x03>;
				gate-shift = <0x00>;
				linux,phandle = <0x73>;
				phandle = <0x73>;
			};

			CLK_aesdma {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x09 0x3e 0x39 0x39>;
				reg = <0x1f207184 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				glitch-shift = <0x04>;
				linux,phandle = <0x5d>;
				phandle = <0x5d>;
			};

			CLK_sd {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x0c 0x2e>;
				reg = <0x1f20710c 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x03>;
				gate-shift = <0x00>;
				linux,phandle = <0xae>;
				phandle = <0xae>;
			};

			CLK_isp {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x08 0x09 0x42 0x07 0x3f 0x3e 0x0a 0x52>;
				reg = <0x1f207184 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x03>;
				gate-shift = <0x08>;
				linux,phandle = <0x17>;
				phandle = <0x17>;
			};

			CLK_fclk1 {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x52 0x06 0x51 0x3e>;
				reg = <0x1f207190 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				linux,phandle = <0x18>;
				phandle = <0x18>;
			};

			CLK_fclk2 {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x3e 0x09 0x07 0x39>;
				reg = <0x1f207194 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				linux,phandle = <0x19>;
				phandle = <0x19>;
			};

			CLK_odclk {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x09 0x29 0x49 0x0e>;
				reg = <0x1f207198 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				linux,phandle = <0x9f>;
				phandle = <0x9f>;
			};

			CLK_dip {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x51 0x50 0x07 0x0a 0x3e 0x0b 0x39 0x39>;
				reg = <0x1f207148 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x03>;
				gate-shift = <0x00>;
				linux,phandle = <0x65>;
				phandle = <0x65>;
			};

			CLK_nlm {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x1b 0x2f>;
				reg = <0x1f226680 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x01>;
				gate-shift = <0x08>;
				auto-enable = <0x01>;
				linux,phandle = <0x9d>;
				phandle = <0x9d>;
			};

			CLK_emac_tx {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x54 0x55>;
				reg = <0x1f22668c 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x01>;
				gate-shift = <0x00>;
				linux,phandle = <0x69>;
				phandle = <0x69>;
			};

			CLK_emac_rx {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x54 0x55>;
				reg = <0x1f226688 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x01>;
				gate-shift = <0x00>;
				linux,phandle = <0x67>;
				phandle = <0x67>;
			};

			CLK_emac_tx_ref {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x55 0x39>;
				reg = <0x1f22668c 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x01>;
				gate-shift = <0x08>;
				linux,phandle = <0x6a>;
				phandle = <0x6a>;
			};

			CLK_emac_rx_ref {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x55 0x39>;
				reg = <0x1f226688 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x01>;
				gate-shift = <0x08>;
				linux,phandle = <0x68>;
				phandle = <0x68>;
			};

			CLK_hemcu_216m {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x07>;
				reg = <0x1f2071b4 0x04>;
				gate-shift = <0x00>;
				linux,phandle = <0x6f>;
				phandle = <0x6f>;
			};

			CLK_csi_mac {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x07 0x06 0x3e 0x08 0x09 0x39 0x39>;
				reg = <0x1f2071b0 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x03>;
				gate-shift = <0x00>;
				linux,phandle = <0x37>;
				phandle = <0x37>;
			};

			CLK_mac_lptx {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x07 0x06 0x3e 0x08 0x09 0x39 0x39>;
				reg = <0x1f2071b0 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x03>;
				gate-shift = <0x08>;
				linux,phandle = <0x76>;
				phandle = <0x76>;
			};

			CLK_ns {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x07 0x39 0x39>;
				reg = <0x1f2071ac 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				linux,phandle = <0x9e>;
				phandle = <0x9e>;
			};

			CLK_mcu_pm {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x07 0x0a 0x3e 0x0b 0x3f 0x08 0x40 0x39 0x39 0x32 0x3a 0x33 0x56 0x3b 0x57 0x58>;
				reg = <0x1f001c80 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x04>;
				gate-shift = <0x00>;
				glitch-shift = <0x07>;
				auto-enable = <0x01>;
				linux,phandle = <0x16>;
				phandle = <0x16>;
			};

			CLK_spi_pm {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x32 0x47 0x59 0x29 0x44 0x5a 0x09 0x40 0x3a 0x5b 0x56 0x3b 0x57 0x58 0x0c 0x33>;
				reg = <0x1f001c80 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x04>;
				gate-shift = <0x08>;
				glitch-shift = <0x0e>;
				auto-enable = <0x01>;
				linux,phandle = <0xb1>;
				phandle = <0xb1>;
			};

			CLK_pm_sleep {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x32 0x3a 0x5b 0x56 0x3b 0x57 0x58>;
				reg = <0x1f001c88 0x04>;
				mux-shift = <0x0c>;
				mux-width = <0x03>;
				linux,phandle = <0xa1>;
				phandle = <0xa1>;
			};

			CLK_sar {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x32 0x3a 0x5b 0x56 0x3b 0x57 0x58>;
				reg = <0x1f001c88 0x04>;
				mux-shift = <0x07>;
				mux-width = <0x03>;
				gate-shift = <0x05>;
				auto-enable = <0x01>;
				linux,phandle = <0xad>;
				phandle = <0xad>;
			};

			CLK_rtc {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x32 0x39 0x39 0x39 0x39 0x39 0x39>;
				reg = <0x1f001c88 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x03>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				linux,phandle = <0xac>;
				phandle = <0xac>;
			};

			CLK_ir {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x32 0x3a 0x5b 0x56 0x3b 0x57 0x58>;
				reg = <0x1f001c84 0x04>;
				mux-shift = <0x07>;
				mux-width = <0x03>;
				gate-shift = <0x05>;
				auto-enable = <0x01>;
				linux,phandle = <0x71>;
				phandle = <0x71>;
			};

			usclk {
				compatible = "usclk";
				clocks = <0x5c 0x39 0x5d 0x4e 0x5e 0x5f 0x60 0x61 0x62 0x63 0x01 0x64 0x37 0x35 0x25 0x65 0x66 0x67 0x68 0x53 0x69 0x6a 0x54 0x18 0x2f 0x19 0x30 0x6b 0x36 0x43 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x17 0x72 0x73 0x74 0x75 0x0e 0x4b 0x4c 0x4d 0x76 0x0d 0x41 0x16 0x77 0x78 0x79 0x10 0x15 0x26 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x1b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x14 0x1d 0x97 0x98 0x99 0x9a 0x13 0x1c 0x9b 0x38 0x08 0x48 0x31 0x5a 0x59 0x3e 0x07 0x40 0x44 0x47 0x06 0x3f 0x42 0x2b 0x0f 0x09 0x4a 0x29 0x49 0x9c 0x11 0x45 0x12 0x46 0x9d 0x9e 0x9f 0xa0 0x34 0xa1 0xa2 0xa3 0xa4 0xa5 0xa6 0xa7 0xa8 0xa9 0xaa 0x22 0x1f 0x24 0x23 0x20 0x1e 0x21 0xab 0x55 0xac 0x32 0x56 0xad 0xae 0x1a 0x1a 0xaf 0xb0 0xb1 0xb2 0xb3 0x27 0xb4 0xb5 0x04 0x51 0x50 0x05 0x0b 0x2a 0x2c 0x2d 0x0a 0x28 0x52 0x4f 0xb6 0xb7 0x0c 0x5b 0x3d 0x3b 0x57 0x58 0x2e 0x3c 0x3a 0x33 0xb8>;
				clock-count = <0xb7>;
			};
		};

		venc {
			compatible = "sstar,venc";
			reg = <0x1f264800 0x100 0x1f264a00 0x100 0x1f264c00 0x100 0x1f264e00 0x100 0x1f265000 0x100 0x1f265200 0x100 0x1f265400 0x100 0x1f265600 0x100 0x1f265800 0x100>;
			reg-names = "mhe-0\0mhe-1\0mhe-2\0mfe-0\0mfe-1\0ven-0\0ven-1\0ven-2\0ven-3";
			interrupts = <0x00 0x35 0x04 0x00 0x3c 0x04>;
			interrupt-parent = <0x02>;
			interrupt-names = "mhe-irq\0mfe-irq";
			clocks = <0xb6 0x9a 0xaa 0x21 0x1c 0x13>;
			clock-names = "CKG_venc";
			status = "ok";
		};

		vpe {
			compatible = "sigmastar,vpe";
			clocks = <0x18 0x19 0x9f>;
			clock-names = "CLK_fclk1\0CLK_fclk2\0CLK_odclk";
			status = "ok";
			DigitalZoom-Dropmode = <0x01>;
			interrupts = <0x00 0x34 0x04 0x00 0x5a 0x04 0x00 0x5b 0x04 0x00 0x31 0x04>;
		};

		vip {
			compatible = "sstar,vip";
			status = "ok";
			CMDQ-mode = <0x01>;
		};

		pnl {
			compatible = "sigmastar,pnl";
			status = "ok";
			ttl-mode = <0x01>;
			jtag-mode = <0x00>;
		};

		disp {
			compatible = "sigmastar,disp";
			status = "ok";
			interrupts = <0x00 0x34 0x04 0x00 0x5a 0x04 0x00 0x5b 0x04 0x00 0x31 0x04>;
		};

		isp {
			compatible = "isp";
			io_phy_addr = <0x1f000000>;
			banks = <0x1302>;
			interrupts = <0x00 0x39 0x04>;
			clocks = <0x17>;
			status = "ok";
			clock-frequency-index = <0x05>;
		};

		csi {
			compatible = "csi";
			io_phy_addr = <0x1f000000>;
			banks = <0x1202 0x1203 0x1204 0x1038 0x101e>;
			interrupts = <0x00 0x41 0x04>;
			status = "ok";
			sr0_mipi_mode = <0x02>;
		};

		vif {
			compatible = "sigma,vif";
			status = "ok";
			reg = <0x1f263200 0x600 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x1f203c00 0x200 0x1f226600 0x200 0x1f207000 0x200 0x1f000000 0x400000>;
			clocks = <0xb2>;
			interrupts = <0x00 0x59 0x04 0x00 0x39 0x04>;
			vif_sr0_par_mode = <0x04>;
			vif_sr0_mipi_mode = <0x02>;
			vif_sr0_bt656_mode = <0x03>;
			vif_sr0_mclk_mode = <0x01>;
			vif_sr0_pdn_mode = <0x01>;
			vif_sr0_rst_mode = <0x01>;
			vif_sr0_parallel_rst_mode = <0x02>;
			vif_sr0_parallel_pdn_mode = <0x02>;
			vif_sr0_mipi_rst_mode = <0x01>;
			vif_sr0_mipi_pdn_mode = <0x01>;
			vif_sr0_hvsync_mode = <0x01>;
			vif_sr0_pck_mode = <0x01>;
			vif_sr1_par_mode = <0x02>;
			vif_sr1_mipi_mode = <0x02>;
			vif_sr1_bt656_mode = <0x02>;
		};

		ispalgo {
			compatible = "sstar,ispalgo";
			status = "ok";
		};

		ispmid {
			compatible = "sstar,ispmid";
			status = "ok";
		};

		sensorif {
			compatible = "sigma,sensorif";
			status = "ok";
			sensorif_grp0_i2c = <0x01>;
		};

		jpe@0x1F264000 {
			compatible = "sstar,cedric-jpe";
			reg = <0x1f264000 0x100>;
			interrupts = <0x00 0x3d 0x04>;
			clocks = <0x73>;
			clock-names = "CKG_jpe";
			clk-select = <0x00>;
			status = "ok";
		};

		ive@0x1F2A4000 {
			compatible = "sstar,infinity3-ive";
			reg = <0x1f2a4000 0x100 0x1f2a4200 0x100>;
			interrupts = <0x00 0x58 0x04>;
			clocks = <0x87>;
			status = "ok";
		};

		gop {
			compatible = "sigmastar,gop";
			clocks = <0x6c 0x18 0x65>;
			status = "ok";
		};

		gop1 {
			compatible = "sstar,infinity-gop1";
			clocks = <0x6d 0x18>;
			status = "ok";
		};

		gop2 {
			compatible = "sstar,infinity-gop2";
			clocks = <0x6e 0x19>;
			status = "ok";
		};

		cmdq0 {
			compatible = "sstar,cmdq0";
			clocks = <0x0d>;
			interrupts = <0x00 0x31 0x04>;
			status = "ok";
		};

		cmdq1 {
			compatible = "sstar,cmdq1";
			clocks = <0x0d>;
			interrupts = <0x00 0x54 0x04>;
			status = "ok";
		};

		cmdq2 {
			compatible = "sstar,cmdq2";
			clocks = <0x0d>;
			interrupts = <0x00 0x55 0x04>;
			status = "ok";
		};

		dip {
			compatible = "sstar,dip";
			clocks = <0x65>;
			interrupts = <0x00 0x5f 0x04>;
			status = "ok";
		};

		uart0@1F221000 {
			compatible = "sstar,uart";
			reg = <0x1f221000 0x100>;
			interrupts = <0x00 0x42 0x04>;
			clocks = <0xb4>;
			status = "ok";
		};

		uart1@1F221200 {
			compatible = "sstar,uart";
			reg = <0x1f221200 0x100>;
			interrupts = <0x00 0x43 0x04>;
			clocks = <0xb5>;
			pad = <0x2b>;
			status = "ok";
		};

		uart2@1F220400 {
			compatible = "sstar,uart";
			reg = <0x1f220400 0x100 0x1f220600 0x100>;
			interrupts = <0x00 0x4f 0x04 0x00 0x50 0x04>;
			clocks = <0x6b>;
			dma = <0x01>;
			pad = <0x0f>;
			status = "disabled";
		};

		emac0 {
			compatible = "sstar-emac";
			interrupts = <0x00 0x3a 0x04 0x00 0x75 0x04>;
			clocks = <0x66 0x69 0x67>;
			reg = <0x1f2a2000 0x800 0x1f343c00 0x600 0x1f006200 0x600>;
			pad = <0x1f203c3c 0x04 0x00>;
			phy-handle = <0xb9>;
			status = "ok";

			mdio-bus {

				ethernet-phy@0 {
					phy-mode = "mii";
					linux,phandle = <0xb9>;
					phandle = <0xb9>;
				};
			};
		};

		flashisp {
			compatible = "mtd-flashisp";
			clocks = <0x5f>;
			quadread = <0x00>;
			status = "ok";
		};

		spinandflash {
			compatible = "ms-spinand";
			clocks = <0x5f>;
			status = "disabled";
		};

		Sstar-ehci-1 {
			compatible = "Sstar-ehci-1";
			clocks = <0x05>;
			interrupts = <0x00 0x3f 0x04>;
			status = "ok";
			dpdm_swap = <0x00>;
			power-enable-pad = <0x50>;
		};

		Sstar-udc {
			compatible = "sstar,infinity-udc";
			interrupts = <0x00 0x40 0x04>;
			status = "disabled";
		};

		spi {
			compatible = "sstar_spi";
			io_phy_addr = <0x1f000000>;
			banks = <0x1110 0x1111 0x1038 0x101e>;
			interrupts = <0x00 0x46 0x04 0x00 0x47 0x04>;
			spi0_mode = <0x01>;
			spi1_mode = <0x01>;
			status = "ok";
		};

		spidev {
			compatible = "spidev";
			status = "ok";
		};

		tp_hrtimer {
			compatible = "tp_hrtimer";
			interrupts = <0x00 0x60 0x04>;
			status = "disabled";
		};

		i2c0@0 {
			compatible = "sstar,i2c";
			reg = <0x1f223000 0x200 0x1f203c00 0x200 0x1f207000 0x200>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			clocks = <0x78>;
			i2c-group = <0x00>;
			status = "ok";
			i2c-padmux = <0x01>;
		};

		i2c1@1 {
			compatible = "sstar,i2c";
			reg = <0x1f223200 0x200 0x1f203c00 0x200 0x1f207000 0x200>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			clocks = <0x79>;
			i2c-group = <0x01>;
			i2c-padmux = <0x01>;
			status = "ok";
		};

		gpio {
			compatible = "sstar,gpio";
		};

		sound {
			compatible = "sstar,audio";
			interrupts = <0x00 0x4a 0x04>;
			playback-volume-level = <0x40>;
			capture-volume-level = <0x40>;
			micin-pregain-level = <0x00>;
			micin-gain-level = <0x03>;
			linein-gain-level = <0x02>;
			amp-gpio = <0x3e 0x01>;
			clocks = <0x50>;
			digmic-padmux = <0x01>;
			i2s-padmux = <0x01>;
			status = "ok";
		};

		sdmmc {
			compatible = "sstar,sdmmc";
			slotnum = <0x01>;
			revcdz = <0x00>;
			slot-ip-orders = <0x00 0x01 0x02>;
			slot-pad-orders = <0x00 0x01 0x02>;
			slot-max-clks = <0x2dc6c00 0x2dc6c00 0x2dc6c00>;
			slot-intcdzs = <0x01 0x01 0x01>;
			slot-fakecdzs = <0x00 0x00 0x00>;
			slot-pwr-gpios = <0x11 0x00 0x00>;
			slot-pwr-actives = <0x00 0x00 0x00>;
			interrupts-extended = <0x02 0x00 0x32 0x04 0x02 0x00 0x33 0x04 0x02 0x00 0x77 0x04 0xba 0x2a 0x02 0x00 0x77 0x04>;
			interrupt-names = "mie0_irq\0mie1_irq\0cdz_slot0_irq\0cdz_slot1_irq\0cdz_slot2_irq";
			clocks = <0xae 0x1a 0xae 0xae 0x1a 0xae 0xae 0x1a 0xae>;
			status = "ok";
		};

		aesdma {
			compatible = "sstar,infinity-aes";
			clocks = <0x5d>;
			status = "ok";
		};

		bdma0 {
			compatible = "sstar,bdma0";
			interrupts = <0x00 0x48 0x04>;
			clocks = <0x5f 0x7b>;
			status = "disabled";
		};

		bdma1 {
			compatible = "sstar,bdma1";
			interrupts = <0x00 0x49 0x04>;
			clocks = <0x5f 0x7b>;
			status = "disabled";
		};

		bdma2 {
			compatible = "sstar,bdma2";
			interrupts = <0x00 0x5d 0x04>;
			clocks = <0x5f 0x7b>;
			status = "disabled";
		};

		bdma3 {
			compatible = "sstar,bdma3";
			interrupts = <0x00 0x5e 0x04>;
			clocks = <0x5f 0x7b>;
			status = "disabled";
		};

		movdma {
			compatible = "sstar,movdma";
			interrupts = <0x00 0x5c 0x04>;
			clocks = <0x10>;
			status = "disabled";
		};

		rtc {
			compatible = "sstar,infinity-rtc";
			reg = <0x1f002400 0x40>;
			interrupts = <0x00 0x4c 0x04>;
			clocks = <0xac>;
			status = "ok";
		};

		rtcpwc {
			compatible = "sstar,infinity-rtcpwc";
			reg = <0x1f006800 0x200>;
			interrupts = <0x00 0x4c 0x04>;
			clocks = <0xac>;
			status = "disabled";
		};

		cpufreq {
			compatible = "sstar,infinity-cpufreq";
			status = "ok";
			vid_width = <0x01>;
			vid_gpios = <0x51>;
			vid_voltages = <0x384 0x3e8>;
			vid_default = <0x00>;
		};

		watchdog {
			compatible = "sstar,infinity-wdt";
			reg = <0x1f006000 0x40>;
			status = "ok";
		};

		sar {
			compatible = "sstar,infinity-sar";
			reg = <0x1f002800 0x200>;
			status = "ok";
		};

		ircut {
			compatible = "sstar,infinity-ircut";
			ircut-gpio-num = <0x3d>;
			interrupt-parent = <0xbb>;
			interrupts = <0x14>;
			status = "disabled";
		};

		pwm {
			compatible = "sstar,infinity-pwm";
			reg = <0x1f003400 0x600>;
			clocks = <0x0c>;
			npwm = <0x0b>;
			pad-ctrl = <0xffff 0x35 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff>;
			status = "ok";
		};

		gpioi2c {
			compatible = "sstar,infinity-gpioi2c";
			sda-gpio = <0x08>;
			scl-gpio = <0x09>;
			status = "ok";
		};

		miu {
			compatible = "sstar,miu";
			interrupts = <0x00 0x51 0x04>;
			status = "ok";
		};
	};

	reserved-memory {
		#address-cells = <0x01>;
		#size-cells = <0x01>;
		ranges;
	};
};